(1) Field of the Invention
The present invention relates to a method for semiconductor manufacturing and more specifically the cleaning of the surface of a semiconductor device prior to the deposition of the contact metallization layer, and particularly, to a method utilizing a hydrogen peroxide cleaning treatment to remove traces of contaminants in the metal contact area prior to the deposition of the contact metal.
(2) Description of Prior Art
As circuit density and therefore device density increases, metal contact dimensions have to be decreased accordingly to minimize the contact area as part of the total chip area. Contact resistance is normally inverse to contact size, that is the smaller the contact size, the higher the contact resistance. This makes contact resistance a significant and sometimes dominant factor in very large scale integration (VLSI) metal system performance. Therefore an important element in the manufacturing and subsequent operation of integrated circuit devices is the electrical contacts and associated contact resistance which are required to conduct the power and signals throughout the integrated circuitry.
For example, for a typical metal oxide semiconductor field effect transistor (MOSFET), these contacts are fabricated through the standard lithographic process utilizing photoresist with optical masks to pattern the contact areas. As illustrated in FIG. 1, a cross section of two typical FET devices are shown. A thin silicon dioxide layer (SiO.sub.2) 12 typically between 80 and 150 .ANG. thick is placed on a substrate 10 as a gate oxide dielectric. This is normally followed by a deposition of polysilicon 14A to a nominal thickness of 3150 .ANG. for the gate control voltage electrode, followed by a tetraethyl orthosilicate (TEOS) oxide layer 16A nominally 3000 .ANG. thick for gate insulation and spacer isolation. After patterning and a TEOS and poly etching processes, a thin layer of silicon nitride (SIN) 22 is deposited to a nominal thickness of 300 .ANG. over the TEOS layer 16A followed by a final contact passivation dielectric of boron phosphorous silicon glass (BPSG) 24 to a nominal thickness of 3000 .ANG.. The structure is subsequently patterned with photoresist (PR) 26 and the contact hole 30A is opened with a wet isotropic etch to produce the structure shape depicted in FIG. 1 in preparation for contact metallization. This contact hole requires a cleaning process that assures good metal contact and subsequent low contact resistance. The final contact opening process is typically a dry etch cleaning step using a gas containing fluorine. This etch is typically followed by a nominal 2 minute buffered oxide etch (BOE) wet dip cleaning step prior to contact metal sputtering. As contact hole dimension is reduced from 2 um to 1 um, this BOE premetal dip does not always remove a fluoride residue left from the dry etch process. Since fluorine acts as a donor element, this residue can affect the contact resistance for a P+ to metal contact. This perturbation in contact resistance can effect device performance and impact process yields for small contact hole devices. It is desired to define a method for improving contact cleaning prior to metal deposition thereby improving the metal contact ohmic resistance maintaining or improving device performance and process yields. U.S. Pat. No. 4,752,505 to Arac teaches a pre-metal deposition clean for B--Si--O insulating layer. U.S. Pat. No. 5,486,266 to Tsia et al shows a method of cleaning a silicon contact surface using H.sub.2 O.sub.2. U.S. Pat. No. 5,229,334 to Kato shows a method of forming a gate insulating layer by cleaning using H.sub.2 O.sub.2. U.S. Pat. No.5,308,400 to Chen shows a wafer cleaning process using H.sub.2 O.sub.2. U.S. Pat. No. 5,670,019 to Huang shows a H.sub.2 O.sub.2 cleaning process for removing precipitates after a tungsten etchback process. U.S. Pat. No. 5,801,096 to Lee et al shows a method of forming contact holes and filling the holes with metal.